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descriptions the ILX522K is a reduction type ccd linear sensor designed for color image scanner use. this sensor reads b4 size documents at a density of 200 dpi. (dot per inch), and has 2lines analog memories to adjust the position of green line and red/blue line. a built-in timing generator and clock- drivers ensure direct drive at 5v logic. features number of effective pixels: 2048 2pixels pixel size red/blue pixel: 14m 12m (14m pitch) green pixel: 14m 14m (14m pitch) built-in timing generator, clock-drivers ultra-low lag good linearity high sensitivity input clock pulse: cmos 5v drive absolute maximum ratings supply voltage v dd1 11 v v dd2 6v pin configuration (top view) block diagram ?1 ILX522K e95436-pp 2048 2pixel ccd linear sensor (color) sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 22 pin dip (cer-dip) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 nc f rs f v1 f v2 gnd v dd2 v gg gnd nc f clk gnd gnd v dd2 v dd1 v out-r/b v out-g v dd1 nc nc v dd1 f rog gnd r1 b1 g1 g2 r1024 b1024 g2047 g2048 2 5 8 10 13 14 15 18 20 21 d46 f rs f v1 f v2 gnd v dd2 v gg gnd f clk gnd output amplifier v dd2 v dd1 v out-r/b v out-g v dd1 v dd1 f rog gnd driver analog memory analog memory readout gate ccd analog shift register d33 b1024 r1024 b1 r1 d32 d13 clock driver aa aa aa aa aa aa readout gate ccd analog shift register clock driver d46 d33 g2048 g2047 g2 g1 d32 d13 driver driver driver 9 12 11 3 4 19 1 16 gnd output amplifier
?2 ILX522K pin description pin no. symbol description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 f rs v dd1 v out-r/b v out-g v dd1 nc nc v dd1 f rog gnd f v2 f v1 v dd2 gnd gnd f clk nc gnd v gg v dd2 gnd nc clock pulse input 9v power supply r/b signal out g signal out 9v power supply nc nc 9v power supply clock pulse input gnd clock pulse input clock pulse input 5v power supply gnd gnd clock pulse input nc gnd output gate bias 5v power supply gnd nc item symbol min. typ. max. unit input capacity of f rs, f clk input capacity of f v1, f v2 input capacity of f rog input clock frequency c f rs, c f clk c f v1, c f v2 c f rog f f rs, f f clk 10 10 10 3.5 pf pf pf mhz note) rules for raising and lowering power supply voltage. to raise power supply voltage, first raise v dd1 (9v) and then v dd2 (5v). to lower voltage, first lower v dd2 (5v) and then v dd1 (9v). clock characteristics recommended supply voltage item v dd1 v dd2 min. 8.5 4.75 typ. 9.0 5.0 max. 9.5 5.25 unit v v
?3 ILX522K electrical characteristics (note 1) (ta = 25?, v dd1 = 9v, v dd2 = 5v f f rs = 3.5mhz light source = 3200k, ir cut filter cm-500s (t = 1.0mm)) item symbol min. typ. max. unit remarks sensitivity sensitivity nonuniformity saturation output voltage dark voltage average dark signal nonuniformity image lag 9v supply current 5v supply current total transfer efficiency output impedance offset level r r r g r b prnu v sat v drk-g v drk-r/b dsnu -g dsnu -r/b il i vdd1 i vdd2 tte z o v os 5.2 6.5 2.8 1.0 92.0 8.0 10.0 4.3 5.0 1.5 0.3 1.5 0.6 2.0 0.02 20 16.0 98.0 150 5.4 10.8 13.5 5.8 15.0 1.5 9.0 3.0 12.0 40 32.0 v/(lx ?s) % v mv % ma ma % v note 2 note 3 note 4 note 5 note 6 note 7 red green blue green red/blue green red/blue note: 1) in accordance with the given electrooptical characteristics, the black level is defined as the average of d3, d4, to d10. 2) for the sensitivity test light is applied with a uniform intensity of illumination. 3) prnu is defined as indicated below in each color. ray incidence conditions are the same as for note 2. prnu = 100 [%] the maximum output of each color is set to v max , the minimum output to v min , and the average output to v ave . 4) use below the minimum value of the saturation output voltage. 5) optical signal accumulated time t int stands at 5ms. 6) v out-g = 500mv (typ.) 7) v os is defined as indicated below. (v max ?v min )/2 v ave aaa a a a aaa aa aa aa v out * gnd v os * v out indicates v out-g and v out-r/b.
?4 ILX522K clock timing chart a aa a a aa a a a a a optical black (18 pixels) dummy signal (32 pixels) 1 line output (2094 pixels) 5v 0v 5v 0v 5v 0v 5v 0v 5v 0v 0 0 f rog f v1 f v2 f clk f rs v out-g v out-r/b 123 d1 d2 d3 d12 d13 d14 d30 d31 d32 g1 g2 g2046 g2047 g2048 d33 d34 d39 d40 d46 d1 d2 d3 d12 d13 d14 d30 d31 d32 r1 b1 d33 d34 d39 d40 d46 a aa a a aa a a a a a 2088 2094 b1023 r1024 b1024 note) f clk, f rs pulses must have more than 2094 cycles.
?5 ILX522K item symbol min. typ. max. unit f rog, f v2 ? f clk pulse timing f rog, f v1, f v2 pulse period f rog ? f v1 pulse timing f v1 ? f clk pulse timing f rog, f v1, f v2 pulse rise time, fall time t1 t2, t4 t3 t5 t6, t7 1 28 1 1 0 2 30 2 2 10 30 ? ? ? ? ns f rog, f v1, f v2, f clk timing f clk t6 t7 t2 t3 t1 t6 t3 t6 t1 t2 t7 t7 t5 t4 f v2 f v1 f rog
?6 ILX522K item symbol min. typ. max. unit f clk pulse high level period f rs pulse high level period signal output delay time t1 t2 t3 t4 t5 t6 135 30 500 * 250 * 60 25 70 25 ns ns ns ns ns ns f clk, f rs, v out timing aaaaa aaaaa aa aa f clk t1 t2 t3 t5 t4 t6 f rs v out * these timing is the condition under f f rs = 1mhz.
?7 ILX522K application circuit nc f v1 gnd v dd2 v gg gnd nc f clk gnd gnd v dd2 f rs f v2 v dd1 v out-r/b v out-g v dd1 nc nc v dd1 f rog gnd 74hc04 f clk 74hc04 f v1 10 16v 0.01 9v 5v 12 13 14 15 16 17 18 19 20 21 22 10 10v 0.01 10 16v 0.01 f rs 1k w 1k w 74hc04 v out-r/b v out-g 2sa1175 2sa1175 f v2 74hc04 f rog 74hc04 2 3 4 5 6 7 8 9 10 11 1 application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
?8 ILX522K spectral sensitivity characteristics (standard characteristics) wave length [nm] relative sensitivity 1.0 0.8 0.6 0.4 0.2 0 400 450 500 550 600 650 700 dark signal output temperature characteristics (standard characteristics) ta ?ambient temperature [?] 0102030405060 output voltage rate 10 5 1 0.5 0.1 integration time output voltage characteristics (standard characteristics) t int ?integration time [ms] 1510 output voltage rate 1 0.5 0.1 example of representative characteristics (v dd1 = 9v, v dd2 = 5v, ta = 25?)
?9 ILX522K operational frequency characteristics of the v dd1 supply current (standard characteristics) f f clk ? f clk clock frequency [mhz] 0 0.5 1.0 1.5 2.0 2.5 3.0 i vdd1 ?v dd1 supply current [ma] 40 30 20 10 0 3.5 ta = 25? 4.75 5 5.25 ta = 25? 9 7 5 3 0 8 6 4 1 2 0 0.5 1.0 1.5 2.0 2.5 3.0 20 15 10 5 0 3.5 ta = 25? offset level vs. v dd1 characteristics (standard characteristics) v dd1 [v] 8.5 9.0 v os ?offset level [v] 9 7 5 3 0 9.5 ta = 25? 8 6 4 1 2 offset level vs. temperature characteristics (standard characteristics) ta ?ambient temperature [?] 04060 v os ?offset level [v] 6 4 0 8 2 10 30 20 50 f f clk ? f clk clock frequency [mhz] operational frequency characteristics of the v dd2 supply current (standard characteristics) i vdd2 ?v dd2 supply current [ma] v os ?offset level [v] offset level vs. v dd2 characteristics (standard characteristics) v dd2 [v] d v os d v dd2 0.54 d v os d ta ?mv/?
?10 ILX522K notes of handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) lonized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) notes on handling ccd cer-dlp packages the following points should be observed when handling and installing cer-dlp packages. a) remain within the following limits when applying static load to the ceramic portion of the package: (1) compressive strength: 39 n/surface (do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) shearing strength: 29 n/surface (3) tensile strength: 29 n/surface (4) torsional strength: 0.9 nm upper ceramic layer aaaaa aaaaa aaaaa 39n lower ceramic layer (1) low-melting glass aaaa aaaa aaaa aaaaa aaaaa aaaaa 29n 29n (2) (3) aaaa aaaa aaaa (4) 0.9nm b) in addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, (1) applying repetitive bending stress to the external leads. (2) applying heat to the external leads for an extended period of time with soldering iron. (3) rapid cooling or heating (4) rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. (5) prying the upper or lower ceramic layers away at a support point of the low-melting glass. note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) soldering a) make sure the package temperature does not exceed 80?. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a grounded 30w soldering iron and solder each pin in less then 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an imaging device, do not use a solder suction equipment. when using an electric desoldering tool, ground the controller. for the control system, use a zero cross type.
?11 ILX522K 4) dust and dirt protection a) operate in clean environments. b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) exposure to high temperatures or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 6) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks. 7) since ILX522K has 2 line memory so that the signal of r/b line is delay, compese the optical system sub- scanning r/b line initially.
?12 ILX522K package outline unit: mm package structure v h 6.26 0.8 22 28.672 (14m 2048pixels) 41.6 0.5 1 11 12 no.1 pixel (green) 40.2 5.0 0.5 4.0 0.5 2.54 0.51 3.65 4.45 0.5 0.25 0?to 9 10.16 10.0 0.5 9.0 0.3 1. the height from the bottom to the sensor surface is 2.45 0.3mm. 2. the thickness of the cover glass is 0.8mm, and the refractive index is 1.5. 22pin dip (400mil) (at stand off) m package material lead treatment lead material package weight cer-dip tin plating 42 alloy 5.2g

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